FEWE, Fpga Easy Web Editor

The Fewe tool make you able to create an embedded PC expansion by a FPGA.

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Build Your FPGA System by the Web Browser

Easy Fpga Web Editor

The LEGOs show how you can use FPGA building blocks to create a custom application

Here you can use the  FPGA Building Blocks to build your custom applications... Using the Easy Fpga Editor (FEWE) you can choose a board and one of its collections of Building Block (a template). You’ll use the template to build your custom application. Note that just your web browser will be needed. If any of the existing templates didn’t meet your needs... Do not worry! You can have, free of charge, a template tailored to yuor needs, please see below the template request editor.

 

  • Push Button starts the Easy Fpga Template EditorClick this button to start the Easy Fpga Editor.
  • Push Button starts the Easy Fpga Template Editor HELPClick this button to start the Easy Fpga Editor Help.

 

 

 

Build Your Template

Make your Build Block collection

Here you can choose your prefered FPGA Building BlocksHere you can choose your preferred FPGA Building Blocks (IP). Using the Template Proposal Editor you can select which IP you would use in some of your designs. You’ll have just choose a target board and edit its configuration table on the web. FEWE Template Editor will perform some online prechecks, when all of them will be OK you will send the template request. We will create, free of charge, a custom template that you will use to create your system by the above Easy Fpga Editor.

 

  • Push Button starts the Easy Fpga Template EditorClick this button to start the template request editor.
  • Push Button starts the Easy Fpga Template Editor HELPClick this button to start the template request editor Help.

 

 

View the available Building Blocks

Here the IP list

A pile of LEGOs makes the idea of the available FPGA IP

Lots of IPs can be used in the Fpga Easy Web Editor. The following table shows some of these that have been made available in the FEWE environment. If you like to have others ones please don’t hesitate to contact us by the info request form.

Name Ip Descriptions Doc.
PCIe Altera PCI Express Hard IP View Pdf Button
PIOs Parallel bidirectional I/O Port with standard features, including edge sensing and interrupt View Pdf Button
PIOb Simply bidirectional Parallel I/O Port with basic features View Pdf Button
IOBUS General purpose I/O bus with up to 24 bits address bits, up to 32 bits data bits, programmable timing, interrupt and optional ready/wait signal View Pdf Button
FIFOI 16 bits Input FIFO with status registers and interrupt can be splitted in two byte wide FIFOs View Pdf Button
FIFOO 16 bits Output FIFO with status registers and interrupt can be splitted in two byte wide FIFOs View Pdf Button
SGDMA The Scatter-Gather Direct Memory Access (SG-DMA) controller core must be used to perform high-speed data transfer between two components. It will be able to transfer data in PC virtual memory space View Pdf Button
UART Simply UART with programmable baud rate (Altera IP) View Pdf Button
16550 UART (Universal Asynchronous Receiver/Transmitter) compatible with the de-facto standard 16550 found in the PC View Pdf Button
SPI Simply SPI port with multiple Chip Select (Altera IP) View Pdf Button
PWM Pulse Width GEB IP can drive CC motor with direction control or servo View Pdf Button
I2C I2C master port (OpenCore IP) View Pdf Button
CFC The CompactFlash core allows you to connect to CompactFlash storage card View Pdf Button

 

 

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